EM2002

EM2002 - Microprocessors and Microcontrollers First Semester, 2016-17 (Odd semester) Course (Catalog) description: This course deals with the architec...

0 downloads 161 Views 279KB Size
Academic Course Description SRM University Faculty of Engineering and Technology Department of Electronics and Communication Engineering

EM2002 - Microprocessors and Microcontrollers First Semester, 2016-17 (Odd semester) Course (Catalog) description: This course deals with the architecture of RISC and CISC processors, specifically ARM and Pentium processors. It also provides adequate study of assembly and C language programming of ARM processor. As an adjunct Lab, Nuvoton embedded development board, which uses Nuvoton ARM processor is studied. There are some case studies to explain the concepts. Compulsory/Elective course: Core course Credit hours: 4 credits Course coordinator(s) K.Ramesh, Assistant Prof., Department of ECE Instructor(s) Name of the instructor

Mr. K. Ramesh

Class handling

Office locatio n

Office phone

M.Tech. EST – A Sec

TP1106 A

2063

Email

[email protected]

Consultations

12.30PM to 1.30PM

Relationship to other courses Pre-requisites

:

Basic knowledge of 8 bit microprocessor

Assumed knowledge :

Basic mathematics

Following courses

-

:

Computer usage: C programming, Keil IDE, Nuvoton development board based software lab. Class Schedule: Three 50 minutes lecture sessions per week, for 13-15 weeks

Section

Schedule Day-1: 2nd Hour

A

Day-5: 3rd and 4th Hour Day-3: 7th and 8th Hour Lab

Professional component General Basic Sciences Engineering sciences & Technical arts Professional subject

-

5% 5% 5% 85%

Broad Area: Processor and instruction set architecture, C language application, assembly programming of ARM processor. Test Schedule S. No.

Test

Portions

Duration

1

Test-1

Session 1 to 4

2 Periods

2

Test-2

Session 1 to 12

3 Hrs

Course objectives 1. To make the student gain proficiency in developing software in C language, for ARM processor. Course Learning Outcome This course provides the foundation in the system concepts of microprocessor architecture RISC and CISC. Covers basic hardware and instruction set architectures, and C language. Students are expected to write programmes in C language and interfacing it with assembly language of ARM processors. Specific issues involved and methods used in using C for embedded software is dealt with. Through lecture and out-of-class assignments, students are provided learning experiences that enable them to: 1. Conceptualize system from given requirements. 2. Read and understanding microprocessor architectures. 3. Design and write programs using C, for developing embedded systems and other related applied areas. 4. Proficiency in developing applications using Nuvoton embedded boards.

Syllabus Contents UNIT I - MICROPROCESSOR ARCHITECTURE (9 hours) Instruction set - Data formats - Instruction formats - Addressing modes - Memory Hierarchy register file - Cache - Virtual memory and paging - Segmentation - Pipelining - The instruction pipeline - pipeline hazards - Instruction level parallelism - reduced instruction set - Computer principles - RISC versus CISC - RISC properties - RISC evaluation - On-chip register files versus cache evaluation. UNIT II - HIGH PERFORMANCE CISC ARCHITECTURE – PENTIUM (9 hours) The software model - functional description - CPU pin descriptions - RISC concepts - bus operations - Super scalar architecture - pipelining - Branch prediction - The instruction and caches Floating point unit - protected mode operation - Segmentation - paging - Protection - multitasking Exception and interrupts - Input/Output - Virtual 8086 model - Interrupt processing - Instruction types - Addressing modes - Processor flags - Instruction set - Basic programming the Pentium Processor. Lab exercise. UNIT III - HIGH PERFORMANCE RISC ARCHITECTURE (9 hours) ARM: The ARM architecture - ARM organization and implementation - The ARM instruction set The thumb instruction set - Basic ARM Assembly language program - ARM CPU cores. The AMULET asynchronous ARM Processors. Embedded Operating Systems - Principle Components – Application case study – VLSI Ruby II Advanced communication processor. UNIT IV - INTRODUCTION TO EMBEDDED C AND APPLICATIONS (9 hours) C-looping structures – Register allocation – Function calls – Pointer aliasing – structure arrangement – bit fields – unaligned data and endianness – inline functions and inline assembly – portability issues. Embedded Systems programming in C – Binding & Running Embedded C program in Keil IDE – Dissecting the program -Building the hardware. Basic techniques for reading & writing from I/O port pins – switch bounce - LED Interfacing using Embedded C. Lab exercise. UNIT V: EMBEDDED OPERATING SYSTEMS (sEOS): (9 hours) Basics of sEOS – Timer Design consideration using sEOS- Multistate system design. Implementation of Traffic light sequencing using on chip UART for RS-232 communicationmemory requirements. Case study – Intruder alarm system. Hyper Terminal based control-packet based control for LED interfacing- Security challenges and authentication process for Embedded Systems. LAB: ARM DEVELOPMENT ENVIRONMENT (45 Hours) Nuvoton Cortex M0 (Nu-LB-NUC140) Micro controller processor & its supporting tools. Lab exercises. RFERENCES: Daniel Tabak, “Advanced Microprocessors-SIE”, Tata McGraw Hill. Inc., 2011. James L. Antonakos, “The Pentium Microprocessor”, Pearson Education, 2002. Steave Furber, “ARM system - on - chip architecture”, Addison Wesley, 2000. Andrew N. Sloss, Dominic Symes, Chris Wright and John Rayfield, “ARM System Developer's Guide, Designing and Optimizing System Software”, Elsevier, 2004. 5. David Seal, “ARM Architecture Reference Manual”, Pearson Education, 2007. 6. Michael J. Pont, “Embedded C”, Addison Wesley, 2002. 1. 2. 3. 4.

Weekly Teaching Plan Week # 1

2 3

Topics Introduction to microprocessor and Nuvoton embedded board. Hardware design issues. Instruction word, addressing modes RISC (ARM) processor architecture Memory hierarchy and cache memory Pipelining and its requirements ARM processor architecture

4

5

6

7 8 -

ARM instruction set architecture, addressing modes. ARM assembly language programming. Recap of C language Efficient C programming, for ARM processor – Part 1 Efficient C programming, for ARM processor – Part 2 Nuvoton board software architecture. VLSI ruby, communication processor Keil IDE structure and use of tools Mid semester review of Lab assignments. Self Study s EOS – an example

9

10

Multistate software; traffic light sequencing using timer. Intruder alarm systems Introduction to Pentium processor. Super scalar architecture - pipelining

11

12

13

Segmentation, paging, protection of memory in Pentium processor. Virtual 8086 mode, Instruction set architecture. C language to assembly conversion for Intel architecture in PC. Examples of assembly programs in Pentium. (Using gcc).

Readings

Assignments

Nu_LB002 User Manual (class notes) Chapter 1 & 2 [Andrew Sloss] & (class notes) Chapter 2 [Andrew Sloss] Chapter 12 [Andrew Sloss] Chapter 2 [Andrew Sloss] Chapter 2 & 3 [Andrew Sloss] Chapter – 3 & 4 [Andrew Sloss] Chapter – 4 : [Andrew Sloss] Essential “C” & (class notes)

Assignment - I

Chapter – 5 : [Andrew Sloss] Chapter – 5 : [Andrew Sloss] NuMicro NUC140 data sheet Chapter – 9 : [Steve Furber] Nu_LB002 User Manual (class notes) & NuMicro NUC140 data sheet Chapter 1 thro' 6 [Michael J.Pont]

Assignment - II

Assignment - III

Chapter 8 :[Steve Furber] Chapter 8 :[Michael J.Pont] Chapter 10:[Michael J.Pont] Assignment - IV Chapter 4 : [James Antonakos] Chapter 4 : [Daniel Tabak] Chapter 4 : [Daniel Tabak] Chapter 2,3 : [James Antonakos] Class notes Class notes

Assignment – V

Evaluation methods (Theory) Test – I Test - II Surprise Test Assignments Internal (Theory) End Semester (Theory) -

10% 10% 5% 5% 30% 40%

Evaluation methods (Practical) In-Lab performance & Record – 15% End Semester (Practical) – 15%

Prepared by: Mr. K.Ramesh (Assistant Professor), Department of ECE Dated: 18-8-2016

Rev. No.: 01

Date of revision: 18-08-2016

K.Ramesh (Assistant Professor)

Dr. R. Kumar

Course-in-charge/Course-coordinator

Professor-in-charge