Parallel Interfacing

Parallel Interfacing Expected Outcomes ... Self-Test Exercise ... If PB0 is connected to a low current speaker, write a program to...

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Chapter 12

Parallel Interfacing Expected Outcomes Identify the internal registers of MC6821 Design the hardware interface for various I/O devices using MC6821 Develop and write codes using MC6821

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Parallel Interface/Timer I/O interface using a simple I/O device such as latch or buffer has its drawbacks One of them is the circuit design must be reconstructed if a user decide to change its I/O devices A dedicated peripheral such as the 68230 (PI/T - Parallel Interface/Timer) Its primary function is to provide parallel interface Its secondary function is a programmable timer

It provides 4 modes of operation with various handshaking and buffering capabilities Unidirectional 8-bits Unidirectional 16-bits Bidirectional 8-bits Bidirectional 16-bits NMKNYFKEEUMP

Parallel Interface/Timer The programmable timer provides a variety of services Periodic interrupt generation Square wave generator Interrupt after time-out Elapse time measurement System watchdog

Since, it is part of 68xxx family, the PI/T is expensive due to its capability to provide wider functions A simple 8-bit family can be used in certain cases to provide parallel I/O interface PIA 6821 peripheral interface adapter is introduced to give flexibility in I/O system NMKNYFKEEUMP

PIA 6821 PIA was initially designed for use in 6800-based system However, it is widely used in 68000-based system due its flexibility and cost Since it is part of 6800 family, additional pin connections are needed to operate in asynchronous mode The port A and B may be programmed individually to be an input or an output – allowing the software to adjust to a new system requirement Additional signal lines may be programmed to allow interrupts and strobe signals for each port Internal register to allow storage of data temporary thus allowing to interface with a slower devices such as printer

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PIA 6821

PIA has two port with each port may drive two TTL loads Each individual signal line (PA0 through PA7 and PB0 through PB7) can be programmed as an input or an output PA6

PA5

PA4

PA3

PA2

PA1

PA0

Vss

9

8

7

6

5

4

3

2

1

32

33

34

35

36

37

38

39

40

D3

D2

D1

D0

RESET*

RS1

RS0

IRQB*

IRQA*

CA2

CA1

PA7 30

6821

31

10

D5

D4

11

29

PB1 12

D6

PB0

PB2

28

E

27

CS1

13

25

CS2*

14

24

CS0

PB3

23

PB4

17

16

22

D7

PB6 18

R/W*

26

PB7 19

21

15

CB1 CB2 20

PB5

Vcc

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PIA 6821 PIA has 6 internal registers that can be programmed to its need Each port has three registers For Port A For Port B Data Register A (DRA) Data Register B(DRB) To transfer data in or out To transfer data in or out Data Direction Register A (DDRA) Data Direction Register B (DDRB) Determine direction of each line Determine direction of each line Control Register A (CRA) Control Register A (CRB) Control the operation of port A Control the operation of port B

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PIA 6821 Internal structure of PIA consist of six registers and control unit

IRQA IRQB

Data Direction Register A (DDRA)

D7-D0 RS0 RS1 E R/W CS0 CS1 CS2 RESET

Control Register A (CRA)

Data Register A (DRA) Control Unit Control Register B (CRB)

Data Direction Register B (DDRB)

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Data Register B (DRB)

PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 CA1 CA2 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 CB1 CB1

Interface With 68000 Since 6821 is operating in synchronous mode, additional pin connections are required 6821

68000

RESET

RESET RS0 RS1

A0 A1

A3-A23

Address Decoder

VPA* R/W* E

R/W* E

UDS*

CS1

VMA*

CS2

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PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 CA1 CA2 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 CB1 CB2

PIA Registers The address of 6 internal registers of PIA depends on Address decoder Data Strobe connection (UDS or LDS) A2 A1

RS1 RS0

LDS*

CS1

A2 A1

RS1 RS0

UDS*

CS1

DDRA/DRA

N+1

N+2

CRA

N+3

N+4

DDRB/DRB

N+5

N+6

CRB

N+7

N

DDRA/DRA

N+1

N+2

CRA

N+3

N+4

DDRB/DRB

N+5

N+6

CRB

N+7

N

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PIA Registers Since there is 6 registers and only four locations, two registers are located in the same address

To distinguish these registers, bit2 of control register is used

RS1

RS1 Register

0

0

Data Register A/Data Direction Reg. A

0

1

Control Register A

1

0

Data Register B/Data Direction Reg. B

1

1

Control Register B

RS1

RS0

0

0

0

X

Data Direction Reg. A (DDRA)

0

0

1

X

Data Register A (DRA)

0

1

X

X

Control Register A (CRA)

1

0

X

0

Data Direction Reg. B (DDRB)

1

0

X

1

Data Register B (DRB)

1

1

X

X

Control Register B (CRB)

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CRA2 CRB2 Register

PIA Registers Data Register A (DRA) bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

DRA7

DRA6

DRA5

DRA4

DRA3

DRA2

DRA1

DDRA0

Data Direction Register A (DDRA) bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

DDRA7

DDRA6

DDRA5

DDRA4

DDRA3

DDRA2

DDRA1

DDRA0

Logic 1 in each DDRAi causes the signal line PAi to become output line Logic 0 in each DDRAi causes the signal line PAi to become input line For example: If DDRA = $4C, PA6, PA3 and PA2 are output and others are input

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Control Register CRA7

CRA6

CRA5

CRA4

CRA3

CRA2

CRA1

CRA0

IRQA

IRQB

CA2

CA2

CA2

DDRA/ DRA

CA1

CA1

Set if transition in CA1 Set if transition in CA2

Refer to data sheet for complete information

0: IRQA disabled 1: IRQA is activated

0: CA1 is recognized on positive -to negative transition

0: CA2 is input 1: CA2 is output If CRA5=0, CRA3 & CRA4 follow

1: CA1 is recognized on positive -to negative transition 0: DDRA is chosen 1: DRA is chosen

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Initialize PIA Initializing PIA is the most crucial steps in programming a system using this I/O device Followings are brief procedure to initialize PIA for simple I/O (Assuming port A) Fill bit 2 of CRA with 0 to access DDRA Fill DDRA with proper value to determine the role of each signal line of the port A (1 for output and 0 for input) Fill bit 2 of CRA with 1 to access DRA Write or read data using DRA

Set CRx2=1

Set direction (DDRx)

Set CRx2=0

Read/Write Data to DRx

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Initialize PIA Example : Initialize PIA assuming port A is an output port and port B is an input port ; Initialize Port A MOVE.B #0,CRA MOVE.B #$FF,DDRA MOVE.B #4,CRA ; Initialize Port B MOVE.B #0,CRB MOVE.B #0,DDRB MOVE.B #4,CRB

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More Examples.. Write a program to switch on the LED as the respective switch is pressed assuming all ports are initialized

+5V

2K2

PB0

PA0

PB1

PA1

PB2

PA2

PB3

PA3

PB4

PA4

PB5

PA5

PB6

PA6

PB7

PA7

330R

2K2 330R

2K2

330R

START MOVE.B DRA,D0 NOT.B D0 MOVE.B DRB BRA START

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2K2

330R 2K2 330R

2K2 330R

2K2 330R 2K2 330R

More Examples.. Write a program to display a pressed number on seven segment display

+5V

2K2

PA0 2K2

PA1 2K2

CLR.B CRA MOVE.B #$F0,DDRA MOVE.B #4,CRA LOOP MOVE.B DRA,D0 ASL.B #4,D0 MOVE.B D0,DRA BRA LOOP

PA2 2K2

PA3 PA4 PA5 PA6 PA7

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a b c B d 7448 e f C g dp D A

a f

e

g

d

b

c dp

More Examples.. Write a program to display an upward counter (0,1,2..8,9,0…) continuously

+5V

2K2

PA0 2K2

PA1 2K2

MAIN CLR.B D0 LOOP MOVE.B D0,DRA BSR DELAY ADDQ.B #1,D0 CMPI.B #10,D0 BNE LOOP BRA MAIN

PA2 2K2

PA3 PA4 PA5 PA6 PA7

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a b c B d 7448 e f C g dp D A

a f

e

g

d

b

c dp

Self-Test Exercise Write as simple program to initialize port A where PA0-PA3 are output and PA4-PA7 are input Exercise If port B is connected to 7-segment display, write a program to initialize port B. Then, write a program to display downward counter on port B Exercise If PB0 is connected to a low current speaker, write a program to generate continuous tone with frequency of 1kHz to the speaker

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Self-Test Exercise Write a program to meet following requirements,

+5V

2K2

If switch 1 is pressed, the segment will display upward counter If switch 2 is pressed, the segment will display downward counter If switch 3 is pressed, the segment will display random value continuously If switch 4 is pressed, the program is terminated

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PA0 2K2

PA1 2K2

PA2 2K2

PA3 PA4 PA5 PA6 PA7

a b c B d 7448 e f C g dp D A

a f

e

g

d

b

c dp