# Simplified model HmAL

Simplified model Real diode. Diode: Continues D1 Half-wave rectifier VS R L Vout +-VD1-Vm Vm VL D1 ON D D1 OFF 1 ON D1 OFF VS positive cycle Equivalen...

Diode

Material: Designation:

p-type

n-type

Anode

Cathode

Symbol: Positive Current flow:

Current HmAL 10 Ideal 8 diode 6 4 2

Simplified model

Real diode

0.5 Simplified equivalent circuit

Forward bias

1.5

2

Vγ Vγ is the cut-in voltage, which is material dependent

Vγ closed

1

Voltage HVL

open

Reverse bias

Si: Vγ ~ 0.6-0.7 V Ge: Vγ ~ 0.2 V

Diode: Continues V

D1 VS

RL

+ Vout -

Half-wave rectifier

Vm

VD1

VL VS

-Vm

D1 ON D1 OFF D1 ON D1 OFF

Equivalent circuit positive cycle

negative cycle

t

Diode: Continues V

D2

D1 VS

-

Vm

2VD(ON)

VS

VL t

+

D4 Full-wave rectifier

D3

-Vm

D2 ON D4 ON

D1 ON D3 ON

D2 ON D4 ON

D1 ON D3 ON

Transistor Emitter (E)

N

Base (B)

P

Collector (C)

Collector

N

IE

IC

Collector

Base

Base

IB VEE

VCC

Emitter

Emitter

PNP

NPN

Structure of an npn transistor Transistor operation mode Cut off Switch (Open state) Forward Active Amplifier Saturation Switch (Closed state) Reversed Active Rarely used

Circuit symbol

Transistor: Forward Active Mode IC

the base-emitter junction acts as a forward biased diode, thus has a voltage dope of ~ 0.6 V

IB VBE

VBE ~ 0.6 − 0.7 V

IE

Characteristic curves for an npn transistor in the common-emitter configuration From KCL, we get From transistor action

I E = IC + I B

(1)

IC = α I E

(2)

α values of commercial transistors are betweens 0.95 - 0.99 Eq. (1) and (2)

IC = β I B

Where β = α/(1−α) =current gain (also used hFE)

Transistor: Continues Example of Transistor Circuit Properties Configuration Common Base

Common Emitter

Common Collector

Power gain

yes

yes

yes

Voltage gain

yes

yes

no

Current gain

no

yes

Yes

Input resistance

30 Ω

3.5 kΩ

580 kΩ

Output resistance

3.1 M Ω

200 kΩ

35 Ω

The values depend upon the particular transistor and other circuit components. To obtain the values int this table, a 2N3904 transistor was uses with RL = 5000 Ω and Rs = 500 Ω

Transistor: Common Collector VCC IB IE

VBB

RL

VBB + Vout

VCC

Vout

Ri

Vout = VBB − VBE ≈ VBB − 0.7 V

Simplified diagram

Thus, we can easily see that Vout follows the input voltage (differed by VBE drop, and also called Emitter follower) Ri =

VBB VBE + I E RL VBE + ( β + 1) I B RL = = IB IB IB

Ri ≈ ( β + 1) RL

If VBE can be neglected, the input impedance is therefore equal to (β+1) times RL

Transistor: Common Collector Given and

β = 100

Simulate using a SPICE progarm:

VCC = 9 V, RL = 10 kΩ Vin = 0-5V triangular wave

~0.6-0.7V Vin

Vout

Vin Vout

cut-off

JFET

iD Drain (D) Channel

p

Gate (G)

n

Depletion Region widens as vDS is increased, until the channel is pinched off

G

G

p

iG

vDS (large)

vGS (constant S Source (S)

iD

Depletion region

Depletion region

G

G

iG vGS S

vDS (small)

JFET: Continues D

G

D

Cutoff:

VGS < VP , I D = 0

Triode region: VP ≤ VGS ≤ 0, VDS ≤ VGS − VP

G

I D = I DSS S

n-channel

S

p-channel

Circuit symbol

2  V       VDS VGS GS 2  − 1  − 1  −   VP   VP   VP  

Saturation (pinch-off) region: VP ≤ VGS ≤ 0, VDS ≥ VGS − VP I D = I DSS (1 −

VGS 2 ) VP

where IDSS = the drain-to-source current with gate shorted to the source Vp= the pinch-off voltage

the

JFET: Source Follower VDD

−VGG + VGS + I D RL = 0

Use KVL:

ID =

VGG

VGS RL

Vout

1 (VGG − VGS ) RL

(1)

If we assume that the n-channel JFET is in the saturation region, therefore, we can write the ID-VGS relation as

ID

 V  I D = I DSS 1 − GS   VP 

2

To get ID and Vout, we must solve the above two equaitons simultaneously. ID

 V  I D = I DSS 1 − GS   VP 

VGS

VP

2

IDSS VGG/RL VGG

ID =

1 (VGG − VGS ) RL

(2)

JFET: Source Follower Given and

ID = 1 mA, VP = -2 V VDD = 9 V, RL = 10 kΩ Vin = 0-5V triangular wave

Vout Vin

Vout

Vin

Simulate using a SPICE progarm:

JFET: Source Follower Given and

β = 100 ID = 1 mA, VP = -2 V VDD = 9 V, RL = 10 kΩ Vin = 0-5V triangular wave

Vout Vin

Vout

Vin

Operational Amplifier: Op Amp VCC(+) Inverting Input

_

Non-inverting Input

+

I1

_

I2

Output

V-

+ V+

VEE(-)

(a) Electrical Symbol for the op amp

(b) Minimum connections to an op amp

Ideal Op Amp Rules: 1. No current flows in to either input terminal 2. There is no voltage difference between the two input terminals Rule 1: I1 = I2 = 0; R+/- = ∞ Rule 2: V+ = V-; Virtually shorted

Vout

Inverting Amplifier Rf

KCL

Use KCL at point A and apply Rule 1: (no current flows into the inverting input)

R1

_

A

vin

+

+

vout -

v A − vin v A − vout + =0 R1 Rf

Rearrange

 1 1   vin vout  vA  + +  −   = 0 R  1 R f   R1 R f 

Apply Rule 2: (no voltage difference between inverting and non-inverting inputs) Since V+ at zero volts, therefore V- is also at zero volts too.

vin vout + =0 R1 R f

Rf vout =− vin R1

vA = 0

Inverting Amplifier: another approach Rf

No current flows into op amp

R1 vin

i

i

From Rule 2: we know that V- = V+ = 0, and therefore 0

vin i= R1

−vin + iR1 − V = 0

_

+

Since there is no current into op amp vout (Rule 1)

+

-

vout = −iR f

−V − + iR f + vout = 0

Combine the results, we get

mV

Rf

vout =− vin R1

vout

60 40 20

Given vin = 5sin3t, R1=4.7 kΩ and Rf =47 kΩ vout = -10vin = -50 sin 3t

0

mV

-20 -40 -60

vin 1

2

3

4

5

6

time

Non-inverting Amplifier Rf

KCL R1

Use KCL at point A and apply Rule 1:

v A v A − vout + =0 R1 Rf

_

A +

vin

+

vin = v A

Apply Rule 2:

vout -

Rf vout = 1+ vin R1 mV

vout

60

Given vin = 5sin3t, R1=4.7 kΩ and Rf =47 kΩ

40 20

vout = 11vin = 55 sin 3t

mV -20 -40 -60

vin 1

2

3

4

5

6

time

Summing Amplifier: Mathematic Operation i = i1 + i2 + i3

Use KCL and apply Rule 1:

i i1

R

i2

R

i3

v1 v2

R

vA

v A − v1 v A − v2 v A − v3 v A − vout + + + =0 R R R Rf

Rf

Since vA = 0 (Rule 2)

_

vB

+

+ vout -

vout = −

Rf R

( v1 + v2 + v3 )

Sum of v1, v2 and v3 v3

Difference Amplifier: Mathematic Operation Use KCL and apply Rule 1:

R4 R1 R2

v1

v2

vA

v A − v1 v A − vout + =0 R1 R4

_

vB

+

R3

Substitute eq. (2) into eq. (1), we get

If R1 = R2 = R and R3 = R4 = Rf

(1)

Since vA = vB (Rule 2) and

+ vout -

 R3  v A = vB =   v2  R2 + R3  vout  R1 + R4   R3  v1 = v −  2  R4  R1 R4  R2 + R3  R1

vout =

Rf R

( v2 − v1 )

Difference of v1and v2

(2)

Differentiator and Integrator: Mathematic Operation R

i vout = − iR

C

i

_ +

vin

But

i=C

dvC and dt

vout

dvin = − RC dt

+ vout -

Differentiator i C R

vout = − vC

+ vc -

t

1 But vC (t ) = ∫ idt + vC (0) and C 0

_

i

+

vin Integrator

vin = vC

+ vout -

t

vout

vin = iR

1 =− vin dt + vC (0) ∫ RC 0